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--  作者：wangxinxin --  发布时间：2010-12-19 14:00:46 --  FPGA 時鐘問題 剛學不久~ 我要做24H製的時鐘~但我一直DEBUG~一直用不出來~ 我Xilinx ISE 8.2i軟體~ 請會的人幫我看一下哪出錯了~謝 library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; ---- Uncomment the following library declaration if instantiating ---- any Xilinx primitives in this code. --library UNISIM; --use UNISIM.VComponents.all; entity CLOCK_00_60 is     Port ( CLK : in  STD_LOGIC;            RESET : in  STD_LOGIC;            ENABLE : out  STD_LOGIC_VECTOR (6 downto 0);            SEGMENT : out  STD_LOGIC_VECTOR (6 downto 0)); end CLOCK_00_60; architecture Behavioral of CLOCK_00_60 is signal SCAN_CLK :STD_LOGIC; signal COUNT_CLK :STD_LOGIC; signal DECODE_BCD :STD_LOGIC_VECTOR (3 downto 0); signal mineable :STD_LOGIC; signal hreable :STD_LOGIC; signal POSITION:STD_LOGIC_VECTOR (6 downto 0); signal DIVIDER:STD_LOGIC_VECTOR (29 downto 1); signal COUNT_BCD:STD_LOGIC_VECTOR (23 downto 0); begin ------------------------------------------------- process (CLK,RESET) begin if RESET = \'0\' then  DIVIDER <= ( others => \'0\'); elsif CLK\' event and CLK = \'1\' then  DIVIDER <= DIVIDER + 1 ; end if; end process; COUNT_CLK<=DIVIDER(24); SCAN_CLK<=DIVIDER(15); ------------------------------------------------秒 process(RESET,SCAN_CLK) begin if RESET = \'0\' then  COUNT_BCD <= ( others => \'0\'); elsif SCAN_CLK\' event and SCAN_CLK = \'1\' then  if   COUNT_BCD(3 downto 0)= x"9" then     COUNT_BCD(3 downto 0)<= x"0";     COUNT_BCD(7 downto 4)<= COUNT_BCD(7 downto 4)+1;  else    COUNT_BCD(3 downto 0)<= COUNT_BCD(3 downto 0)+1;  end if; end if; end process; mineable <= \'1\' when COUNT_BCD(7 downto 0) = x"59" else \'0\'; ----------------------------------------------------------分 process(RESET,SCAN_CLK) begin if RESET = \'0\' then  COUNT_BCD <= ( others => \'0\');  if mineable = \'1\' then elsif SCAN_CLK\' event and SCAN_CLK = \'1\' then  if   COUNT_BCD(11 downto 8)= x"9" then     COUNT_BCD(11 downto 8)<= x"0";     COUNT_BCD(15 downto 12)<= COUNT_BCD(15 downto 12)+1;  else    COUNT_BCD(11 downto 8)<= COUNT_BCD(11 downto 8)+1;  end if; end if; end if; end process; hreable <= \'1\' when COUNT_BCD(15 downto 8) = x"59" else \'0\'; -------------------------------------------------------------時 process(RESET,SCAN_CLK) begin if RESET = \'0\' then  COUNT_BCD <= ( others => \'0\');   if mineable = \'1\' and hreable = \'1\' then elsif SCAN_CLK\' event and SCAN_CLK = \'1\' then  if   COUNT_BCD(19 downto 16)= x"9" then     COUNT_BCD(19 downto 16)<= x"0";     COUNT_BCD(23 downto 20)<= COUNT_BCD(23 downto 20)+1;   if   COUNT_BCD(19 downto 16)= x"2" then    COUNT_BCD(23 downto 20)<= x"0";  else    COUNT_BCD(19 downto 16)<= COUNT_BCD(19 downto 16)+1;   end if;  end if;   end if; end if; end process; process(RESET,SCAN_CLK) begin if RESET = \'0\' then  POSITION <= "1111110"; elsif SCAN_CLK\' event and SCAN_CLK = \'1\' then  POSITION<="111111"&POSITION(0); end if; end process; ENABLE<=POSITION; ----------------------------------------------------------- process(POSITION,SCAN_CLK) begin case POSITION is  when "1111110" => DECODE_BCD <=COUNT_BCD(3 downto 0);    --秒  when "1111101" => DECODE_BCD <=COUNT_BCD(7 downto 4);    --秒  when "1111011" => DECODE_BCD <=COUNT_BCD(11 downto 8);   --分  when "1110111" => DECODE_BCD <=COUNT_BCD(15 downto 12);   --分    when "1101111" => DECODE_BCD <=COUNT_BCD(19 downto 16);   --時    when "1011111" => DECODE_BCD <=COUNT_BCD(23 downto 20);   --時  when others => null; end case; end process;   with DECODE_BCD Select SEGMENT<= "1000000" when X"0",   "1111001" when X"1",   "0100100" when X"2",   "0110000" when X"3",   "0011001" when X"4",   "0010010" when X"5",   "0000010" when X"6",   "1111000" when X"7",   "0000000" when X"8",   "0010000" when X"9",   "1111111" when others; end Behavioral;